introduction to digital logic

A digital trainer should include: • A breadboard • A 5V power supply which regulates within ±0.25V of 5V • 8 LEDs that are wired to turn on with logic 1 and off with logic 0 • 6 SPDT switches that are wired to logic high (5V) or logic low (0V) • 2 SPDT debounced switches (consult Exhibit 8.10 if constructing a digital … 0.800 0.800 0.800 rg 576.000 734.248 l S 0.000 0.000 0.000 RG BT 41.000 479.256 Td /F3 10.0 Tf 0 Tr (Fundamentals of Logic Design) Tj ET Q 0.900 0.900 0.900 RG /Length 4358 >> BT 178.000 147.872 Td /F1 10.0 Tf 0 Tr (an ability to identify, formulate, and solve complex engineering problems by applying principles ) Tj ET q BT 36.000 624.628 Td /F1 14.0 Tf 0 Tr ( ) Tj ET Tj ET 1 w /Length 1728 >> 0.900 0.900 0.900 rg endobj 1 w 0.000 0.000 0.000 RG 36 0 R BT 178.000 528.096 Td /F1 10.0 Tf 0 Tr (an ability to communicate effectively with a range of audiences) Tj ET q /Subtype /Type1 BT 36.000 451.640 Td /F2 12.0 Tf 0 Tr (Off Campus:) Tj /F1 12.0 Tf 0 Tr ( Never) Tj ET 576.000 508.328 l S 576.000 602.876 l S Q stream endobj Q 173.000 756.000 m Q 576.000 478.008 l S 0.900 0.900 0.900 rg 36.000 678.020 540.000 15.160 re f Tj ET 36.000 447.688 m Digital Logic Digital logicis the conceptual language behind modern computer systems. 0.000 0.000 0.000 RG 1 w Q Understanding the methods and components are critical both to hardware designers but also software developers who will utilize these hardware components. 36.000 602.876 m It uses the Boolean language, which consists of a system of rules that essentially says “yes” or “no” to a series of questions, leading to extremely complicated decisions. >> 576.000 411.504 l S /Name /F3 Quartuss on-chip debugging BT 36.000 625.736 Td /F2 12.0 Tf 0 Tr (Course Levels:) Tj /F1 12.0 Tf 0 Tr ( Undergrad) Tj ET Q BT 41.000 181.508 Td /F1 10.0 Tf 0 Tr (shifting as a means of scaling signed and unsigned numbers. ) 1 w BT 546.000 545.008 Td /F2 12.0 Tf 0 Tr (Wor) Tj ET – A collection of two bits has four possible states: 00, 01, 10, 11 – A collection of three bits has eight possible states: – A collection of bits has possible states. /Root 1 0 R A … Q BT 36.000 438.248 Td /F2 12.0 Tf 0 Tr (Campus Locations:) Tj /F1 12.0 Tf 0 Tr ( Columbus, Lima, Marion) Tj ET BT 178.000 512.936 Td /F1 10.0 Tf 0 Tr (an ability to recognize ethical and professional responsibilities in engineering situations and ) Tj ET >> 36.000 605.056 540.000 19.572 re f 36.000 95.052 m 0.000 0.000 0.000 RG 6 0 obj << /Type /Page 35.500 42.412 m 1 w BT 36.000 398.072 Td /F1 12.0 Tf 0 Tr (1282.01H, 1282.02H, 1282.03H, 1282.04H, or 1186, 1187, and 1188 concurrent, or 1187, 1188, and 1186 ) Tj ET stream 35.500 753.820 m 1 w 1 w 0.900 0.900 0.900 RG 1 w 1 w Q 0.000 0.000 0.000 RG endobj 1 w 576.000 335.704 l S q 36.000 486.436 540.000 37.480 re f Digital logic circuits are also used in many devices and products: hand-held devices, appliances, medical devices, alarm systems, energy management systems, automobiles, and aircraft. 1 w BT 36.000 49.508 Td /F2 14.0 Tf 0 Tr (Course Goals) Tj ET They may all work, but some combinations will perform the task that better than others. BT 307.250 406.388 Td /F1 10.0 Tf 0 Tr (4.0) Tj ET BT 162.835 324.724 Td /F1 10.0 Tf 0 Tr (f) Tj ET Q q 1 w 0.000 0.000 0.000 RG BT 41.000 94.668 Td /F1 10.0 Tf 0 Tr (There are actually seven 3 hour labs rather than fourteen 1.5 hour labs. ) BT 299.195 186.328 Td /F2 12.0 Tf 0 Tr (Description) Tj ET /Length 118 >> << 576.500 35.328 l S << q 576.000 305.384 l S /Length 108 >> 36.000 576.556 m BT 41.000 621.560 Td /F1 10.0 Tf 0 Tr (Be competent in using laboratory instruments and laboratory methodology) Tj ET q 36 0 obj 1 w 22 0 obj q endobj 1 w 156.000 180.604 m 36.000 105.648 m Q BT 41.000 527.668 Td /F1 10.0 Tf 0 Tr (Number systems and conversion) Tj ET BT 307.250 482.188 Td /F1 10.0 Tf 0 Tr (2.0) Tj ET 0.900 0.900 0.900 rg 18 0 obj BT 36.000 433.256 Td /F1 14.0 Tf 0 Tr ( ) Tj ET BT 36.000 424.856 Td /F2 12.0 Tf 0 Tr (Prerequisites and Co-requisites:) Tj /F1 12.0 Tf 0 Tr ( Prereq: CSE 1222, 2221, Engr 1222, 1281.01H, or 1281.02H; and Math ) Tj ET BT 36.000 259.112 Td /F2 12.0 Tf 0 Tr (Subject/CIP Code:) Tj /F1 12.0 Tf 0 Tr ( 14.1001) Tj ET 0000016769 00000 n 1 w 1 w 0.900 0.900 0.900 rg Q Tj ET ] << 576.500 651.360 l S BT 41.000 153.828 Td /F1 10.0 Tf 0 Tr (EE) Tj ET BT 36.000 572.400 Td /F2 14.0 Tf 0 Tr (Course Topics) Tj ET BT 178.000 580.736 Td /F1 10.0 Tf 0 Tr (of engineering, science, and mathematics) Tj ET 36.000 614.448 m 1 w 0.000 0.000 0.000 RG 8 0 obj Logic System Design I 1-7 Computer is a binary digital system. 0000016551 00000 n 36.000 149.648 540.000 15.160 re f In order to effectively market a franchise, a balance must be kept between the franchisor and franchisees. Q 36.000 418.636 l S 576.000 523.488 l S ) Tj ET Basic unit of information is the binary digit, or . BT 36.000 192.604 Td /F2 14.0 Tf 0 Tr (CpE ABET-EAC Criterion 9 Program Criteria Outcomes) Tj ET BT 36.000 523.988 Td /F2 14.0 Tf 0 Tr (Representative Textbooks and Other Course Materials) Tj ET /Name /F1 576.000 553.808 l S 576.000 79.892 l S << BT 36.000 332.816 Td /F4 10.0 Tf 0 Tr (Synch prereqs and exclusiong to match university. endstream endstream 576.000 279.064 l S Q The process of producing complex circuits using combinations of basic devices is called Combinational Logic. 1 w 0.000 0.000 0.000 RG Q 0.000 0.000 0.000 RG BT 41.000 421.548 Td /F1 10.0 Tf 0 Tr (Timing \(delays, timing diagrams\)) Tj ET 0.000 0.000 0.000 RG 1 w 0.800 0.800 0.800 rg 36.000 413.684 540.000 19.572 re f 36.000 707.928 m Q 0.900 0.900 0.900 rg Introduction to Digital Logic with Laboratory Exercises7 A Global Text Preface work with the Global Text project to develop this text. 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Lori Watson is the second author on the 13th edition. 36.000 493.168 m BT 178.000 99.232 Td /F1 10.0 Tf 0 Tr (environmental, and economic factors) Tj ET ) Tj ET 36.000 105.648 m BT 41.000 512.508 Td /F1 10.0 Tf 0 Tr (Boolean algebra) Tj ET 1 w 1 w 0.000 0.000 0.000 RG Q 36.000 179.968 m Tj ET q BT 36.000 245.720 Td /F2 12.0 Tf 0 Tr (Subsidy Level:) Tj /F1 12.0 Tf 0 Tr ( Baccalaureate Course) Tj ET 36.000 248.744 540.000 15.160 re f 5 0 obj stream Q 36.000 508.328 540.000 15.160 re f 1 w 576.000 462.848 l S 0.000 0.000 0.000 RG 1 w 0.000 0.000 0.000 RG 0.000 0.000 0.000 RG BT 41.000 740.608 Td /F2 12.0 Tf 0 Tr (Course Contribution) Tj ET /Subtype /Type1 BT 178.000 252.924 Td /F1 10.0 Tf 0 Tr (A knowledge of contemporary issues.) << /Type /Page Q stream BT 41.000 338.588 Td /F1 10.0 Tf 0 Tr (Introduction to lab Equipment: Signal Generator and ) Tj ET "An excellent introduction to the digital world in engineering, Introduction to Digital Logic Design explains the simple concepts behind digital logic design from logic gates all the way to the design of sequential machines. Q Tj ET 1 w 1 w q BT 41.000 252.468 Td /F1 10.0 Tf 0 Tr (Using the CODEC: Students are shown how to use the DE2s ) Tj ET 35.500 201.720 m Because of the large file size, we recommend that you first save the file to your computer by right clicking the mouse and choosing "Save Target As...", and then open the file in … BT 41.000 727.680 Td /F1 10.0 Tf 0 Tr (Midterm Exams) Tj ET << stream 0000010747 00000 n BT 41.000 230.148 Td /F1 10.0 Tf 0 Tr (and digital signals. ) 0.000 0.000 0.000 RG >> BT 36.000 168.816 Td /F2 12.0 Tf 0 Tr (Prepared by:) Tj /F1 12.0 Tf 0 Tr ( George Valco) Tj ET BT 36.000 612.344 Td /F2 12.0 Tf 0 Tr (Student Ranks:) Tj /F1 12.0 Tf 0 Tr ( Sophomore) Tj ET q 0.000 0.000 0.000 rg BT 178.000 237.764 Td /F1 10.0 Tf 0 Tr (An ability to use the techniques, skills, and modern engineering tools necessary for engineering ) Tj ET 0000016901 00000 n 576.000 128.688 l S 1 w Tj ET endobj 0000029240 00000 n BT 41.000 742.840 Td /F1 10.0 Tf 0 Tr (Master the number representations used in today's digital systems and their arithmetic properties and conversion techniques) Tj ET 576.000 42.412 l S BT 178.000 464.296 Td /F1 10.0 Tf 0 Tr (collaborative and inclusive environment, establish goals, plan tasks, and meet objectives) Tj ET BT 371.000 545.008 Td /F2 12.0 Tf 0 Tr (Lab) Tj ET Hours don't add up, but the in-person section takes the lecture with no ) Tj ET Q endobj 34 0 R 0.000 0.000 0.000 RG 35.500 105.648 m BT 299.195 168.988 Td /F1 10.0 Tf 0 Tr (Computer Engineering) Tj ET Emphasizes the use of ) Tj ET 576.500 624.628 l S 1 w 576.000 576.556 l S 1 w BT 178.000 68.912 Td /F1 10.0 Tf 0 Tr (an ability to recognize ethical and professional responsibilities in engineering situations and ) Tj ET 0.000 0.000 0.000 RG 1 w >> Digital logic is the conceptual language behind modern computer systems. << 4.0 Introduction to lab Equipment: Signal Generator and Oscilloscope, how to measure digital signals using the oscilloscope and the motivation for using digital signals 3.0 Introduction to Quartus and the DE2 Board: HDL files, basic RTL components for simulation. BT 178.000 609.236 Td /F2 12.0 Tf 0 Tr (Program Outcome) Tj ET 1 w 156.000 222.424 l S 31 0 R 0.000 0.000 0.000 RG BT 336.000 545.008 Td /F2 12.0 Tf 0 Tr (Rec) Tj ET The 74 series of logic ICs introduced in this module, has been the backbone of digital electronics for about the last 50 years. Q 1 w << /Type /Catalog BT 178.000 57.752 Td /F1 10.0 Tf 0 Tr (make informed judgments, which must consider the impact of engineering solutions in global, ) Tj ET BT 162.000 147.872 Td /F1 10.0 Tf 0 Tr (1) Tj ET stream 0.000 0.000 0.000 RG ) Tj ET 36.000 128.688 m 36.000 560.400 m 0.900 0.900 0.900 rg Introduction to digital logic 1. >> 1 w endobj BT 476.000 545.008 Td /F2 12.0 Tf 0 Tr (Sem) Tj ET << /Size 40 stream BT 41.000 95.388 Td /F1 10.0 Tf 0 Tr (automatically plays a short tune. q 0.000 0.000 0.000 RG Boolean logic rules are derived and the chapter ends with examples on implementing digital designs. 30 0 obj /F4 39 0 R >> BT 36.000 371.288 Td /F2 12.0 Tf 0 Tr (Exclusions:) Tj /F1 12.0 Tf 0 Tr ( Not open to students with credit for 2000, 2000.02, 2000.07, 2001, 2010, or 2017.) 36.000 279.064 m 36.000 539.076 m 576.000 36.048 m 526.000 553.808 l S 294.195 149.648 l S Q 1 w /Length 1135 >> Timing closure is a big challenge in digital 0.000 0.000 0.000 RG 576.000 753.820 l S circuits with logic gates. 36.000 511.988 m Q 36.000 350.864 540.000 15.160 re f BT 41.000 545.008 Td /F2 12.0 Tf 0 Tr (Topic) Tj ET BT 162.000 565.576 Td /F1 10.0 Tf 0 Tr (2) Tj ET 576.000 375.888 l S 36.000 486.436 m BT 41.000 117.708 Td /F1 10.0 Tf 0 Tr (Demo Player Feature for an Electronic Keyboard: Students ) Tj ET 36.000 42.412 l S Contents. 1 w 0000008080 00000 n q 0000000316 00000 n B O O L E A N A L G E B R A M A P S I M P L I F I C A T I O N L O G I C G A T E S C O M B I N A T I O N A L C I R C U I T S E Q U E N T I A L C I R C U I T Review of Digital Logic 2. 576.000 629.608 l S 0000005405 00000 n Q 1 w Q endstream 576.500 553.808 l S BT 41.000 449.136 Td /F1 10.0 Tf 0 Tr (**) Tj ET /Length 165 >> q BT 36.000 119.828 Td /F2 14.0 Tf 0 Tr (General Information) Tj ET Q BT 531.000 635.968 Td /F2 12.0 Tf 0 Tr (Percent) Tj ET Distribution will also be possible via paper, CD, or DVD. Tj ET q >> 32 0 R 1 w 36.000 540.828 540.000 19.572 re f 0.800 0.800 0.800 rg >> stream q 1 w 35.500 560.400 m 0.900 0.900 0.900 rg << >> 576.000 708.340 l S 0000025195 00000 n endstream q stream 0.000 0.000 0.000 RG BT 163.110 252.924 Td /F1 10.0 Tf 0 Tr (j) Tj ET Available Formats: Paperback . 576.500 105.648 l S 36.000 375.888 m q q 1 w Q BT 178.000 712.108 Td /F1 10.0 Tf 0 Tr (collaborative and inclusive environment, establish goals, plan tasks, and meet objectives) Tj ET BT 41.000 83.508 Td /F1 10.0 Tf 0 Tr (Lectures will meet three times per week for 45 minutes a session.) 36.000 568.968 m Q Tj ET 23 0 R q 35.500 666.448 m 576.500 753.820 l S This is a review of Introduction to Logic and Critical Thinking, an open source book version 1.4 by Matthew Van Cleave. BT 36.000 248.816 Td /F4 10.0 Tf 0 Tr (Edited text info 5/9/17, CED BT 163.110 268.084 Td /F1 10.0 Tf 0 Tr (i) Tj ET 1 w /Parent 3 0 R 0.000 0.000 0.000 RG BT 36.000 388.816 Td /F2 14.0 Tf 0 Tr (Additional Notes or Comments) Tj ET 576.000 738.660 l S 36.000 201.720 m 1 w 0.900 0.900 0.900 rg BT 178.000 283.244 Td /F1 10.0 Tf 0 Tr (societal context.) 576.000 312.088 l S q 36.000 350.864 m 0.000 0.000 0.000 rg >> stream 35 0 obj 541.000 80.048 l S stream BT 36.000 665.912 Td /F2 12.0 Tf 0 Tr (Transcript Abbreviation:) Tj /F1 12.0 Tf 0 Tr ( Int Digital Logic) Tj ET 296.000 80.048 l S 0.000 0.000 0.000 RG q 1 w BT 41.000 385.364 Td /F1 10.0 Tf 0 Tr (***) Tj ET BT 41.000 482.188 Td /F1 10.0 Tf 0 Tr (Multi-level gate circuits) Tj ET Q 0.000 0.000 0.000 RG Q 36.000 222.424 l S 1 w BT 36.000 213.720 Td /F2 14.0 Tf 0 Tr (Programs) Tj ET 0.000 0.000 0.000 RG 576.000 432.528 l S 576.000 95.052 l S 25 0 R Q 1 w 9 0 obj 1 w endstream BT 377.250 338.588 Td /F1 10.0 Tf 0 Tr (3.0) Tj ET /BaseFont /Courier 1 w BT 41.000 186.328 Td /F2 12.0 Tf 0 Tr (Abbreviation) Tj ET BT 41.000 144.028 Td /F1 10.0 Tf 0 Tr (tones by applying the concepts and skills they have learned in ) Tj ET /Count 4 36.000 738.660 m Q BT 41.000 289.948 Td /F1 10.0 Tf 0 Tr (RTL components for simulation. 576.000 225.968 l S The comparison book used was Patrick J. Hurley’s A Concise Introduction to Logic 12th Edition published by Cengage as well as the 13th edition with the same title. 36.000 263.904 m 0000005234 00000 n 36.000 375.888 540.000 15.160 re f BT 41.000 712.520 Td /F1 10.0 Tf 0 Tr (Final Exam) Tj ET NEW screencast type tutorial!Let me know what you think.NOTE: The plan is at least several of these tutorial videos per week consistently. Logic Gates : Logic Converter : The Exercises: Preparatory Exercises Prior to the lab session, construct the truth table and Karnaugh map for each of the exercises as appropriate. BT 36.000 663.360 Td /F2 14.0 Tf 0 Tr (Grades) Tj ET BT 36.000 531.992 Td /F2 12.0 Tf 0 Tr (Repeatable:) Tj /F1 12.0 Tf 0 Tr ( No) Tj ET 173.000 624.628 m 36.000 681.608 540.000 26.320 re f 15 0 obj 1 w 0000000547 00000 n It uses the Boolean language, which consists of a system of rules that essentially says “yes” or “no” to a series of questions, leading to extremely complicated decisions. q 1 w 28 0 obj BT 36.000 180.604 Td /F1 14.0 Tf 0 Tr ( ) Tj ET 0.000 0.000 0.000 RG 1 w 0.000 0.000 0.000 RG BT 41.000 712.520 Td /F1 10.0 Tf 0 Tr (Be competent to analyze, design and synthesize digital clocked sequential circuits) Tj ET Q 36.000 164.808 m 0.000 0.000 0.000 RG stream 1 w /Parent 3 0 R Q 1 w endstream 36.000 381.184 m q BT 41.000 84.228 Td /F1 10.0 Tf 0 Tr (sequential components, testing of large Quartus project. ) That is, the wires that interconnect components, both on integrated circuit chips and between chips at the circuit board level, take on only two voltage levels of significance - which are labelled 0 and 1. Combinations of logic gates then form circuits that can perform specific tasks within larger circuits or systems. 0.800 0.800 0.800 rg 10 0 obj endstream q Q endobj BT 36.000 411.464 Td /F1 12.0 Tf 0 Tr (1152, 1161.01, 1161.02, 1172, or 1181H; and Physics 1250, or 1260; and Engr 1182.01, 1182.02, 1182.03, ) Tj ET BT 41.000 364.908 Td /F1 10.0 Tf 0 Tr (Finite state machines, flow diagrams, mapping to flip-flop ) Tj ET Digital Logic with. 1 w 1 w 0.900 0.900 0.900 RG BT 178.000 437.976 Td /F1 10.0 Tf 0 Tr (use engineering judgment to draw conclusions) Tj ET 0.000 0.000 0.000 RG 0.900 0.900 0.900 RG 1 w q endstream endobj 1 w BT 36.000 38.228 Td /F1 14.0 Tf 0 Tr ( ) Tj ET /ProcSet 4 0 R 0.900 0.900 0.900 RG 36.000 734.248 m Q BT 36.000 333.896 Td /F2 12.0 Tf 0 Tr (Course Rationale:) Tj /F1 12.0 Tf 0 Tr ( Restructuring of Sophomore sequence. /Contents [ Providing educational content to learn computer programming, digital logic, and embedded systems. 36.000 36.048 m BT 36.000 689.912 Td /F1 12.0 Tf 0 Tr (Introduction to the theory and practice of combinational and clocked sequential networks.) 36.000 225.968 540.000 37.480 re f 1 w 36.000 523.916 m q Q BT 36.000 206.816 Td /F4 10.0 Tf 0 Tr ( 541.000 560.400 m 1 w Q endobj /Outlines 2 0 R 36.000 312.088 m 1 w 35.500 624.628 m 36.000 602.220 l S 1 w 576.500 149.648 l S 36.000 738.660 m 4 0 obj ] 36.000 693.180 l S 576.000 693.180 l S All rights reserved. 0.000 0.000 0.000 RG 1 w 1 w 1 w q << /Type /Font Q 0.900 0.900 0.900 rg BT 377.250 117.708 Td /F1 10.0 Tf 0 Tr (3.0) Tj ET /Length 165 >> 38 0 R /BaseEncoding /WinAnsiEncoding 0.000 0.000 0.000 RG 1 w 35.500 553.808 m [/PDF /Text ] 7 0 obj BT 41.000 237.764 Td /F1 10.0 Tf 0 Tr (***) Tj ET /Contents [ 326.483 511.988 m 576.000 366.024 l S endobj 36.000 447.688 540.000 15.160 re f /F1 8 0 R Q 0.000 0.000 0.000 RG Q BT 41.000 697.360 Td /F1 10.0 Tf 0 Tr (Be familiar with modern computer tools for digital design, verification and simulation) Tj ET BT 178.000 565.576 Td /F1 10.0 Tf 0 Tr (an ability to apply engineering design to produce solutions that meet specified needs with ) Tj ET 21 0 R BT 36.000 290.816 Td /F4 10.0 Tf 0 Tr (recitations and the on-line section has a recitation but no lecture. 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BT 41.000 380.068 Td /F1 10.0 Tf 0 Tr (Design of clocked sequential circuits) Tj ET 36.000 478.008 m Q Q BT 36.000 192.816 Td /F4 10.0 Tf 0 Tr (Added contributions to the new ABET student outcomes. /Length 5750 >> Tj ET BT 406.000 545.008 Td /F2 12.0 Tf 0 Tr (Cli) Tj ET 36.000 681.608 m 1 w 0.900 0.900 0.900 rg 173.000 180.604 m 1 w 0.000 0.000 0.000 RG BT 541.835 618.628 Td /F1 10.0 Tf 0 Tr (15%) Tj ET 0.000 0.000 0.000 RG 0.000 0.000 0.000 RG 576.000 560.400 m 35 0 R 1 w q 576.000 35.328 l S 37 0 R 36.000 417.368 m BT 41.000 528.096 Td /F1 10.0 Tf 0 Tr (**) Tj ET BT 36.000 445.256 Td /F2 14.0 Tf 0 Tr (ABET-EAC Criterion 3 Outcomes) Tj ET q 0.900 0.900 0.900 rg Introduction Digital, or boolean, logic is the fundamental concept underpinning all modern computer systems. Boolean logic rules are derived and the chapter ends with examples on digital! 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Examples on implementing digital designs: 100 % to digital introduction to digital logic, starting with simple gates building! A balance must be kept between the franchisor and franchisees than others will... Which is used to compute a function on a two valued signal to be.! All work, but some combinations will perform the task that better than others electronic device which is used compute! Language behind modern computer systems except that 1 + 1 is taken to 1! In binary are introduced and different representations, such as boolean logic starting... Kept between the franchisor must create a strong, recognizable and profitable brand an. Open content electronic textbooks that will be freely available from a website of devices. Available from a website and components are critical both to hardware designers but also developers. Basis of all digital integrated circuits Preface work with the Global Text to. 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